To provide more dense memory for computing operations, concepts involving memory devices (which may be referred to as 3D stacked memory, or stacked memory) having a plurality of closely coupled memory elements have been developed. A 3D stacked memory may include coupled layers or packages of DRAM (dynamic random-access memory) memory elements, which may be referred to as a memory stack.
Stacked memory may be utilized to provide a great amount of computer memory in a single device or package, where the device or package may also include certain system components, such as a memory controller and CPU (central processing unit).
However, in conventional implementations of multichannel 3D stacked DRAM architectures, such as WideIO, the voltage domain (which may be referred to as voltage Vint) for data path, codecs and clocking is the same across each of the multiple microchannels of the architecture. For this reason, it is not possible to modify voltage levels to operate efficiently within each microchannel of the memory device.